Datasheet

System Control Subsystem
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 447
24.3.1.48 Host Processor Interrupt Routing Mask 29
(INT_FLASH_CONTROLLER_0_MASK)
MEM Offset (00000000) 4C0h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0001_0001h
Bit
s
Acce
ss
Type
Defa
ult
Description Power
Well
ResetSi
gnal
31:
17
RO 15'h00
00
RSVD (RSVD)
Reserved
16 RW/P
/L
1'b1 Flash Controller 0 Host Halt interrupt
mask
(INT_FLASH_CONTROLLER_0_HOST_
HALT_MASK)
0: Interrupt Event triggers a warm reset
or entry into probe mode based on
P_STS.HALT_INT_REDIR
1: Masked
15:
1
RO 15'h00
00
RSVD (RSVD)
Reserved
0 RW/P
/L
1'b1 Flash Controller 0 Host interrupt
mask
(INT_FLASH_CONTROLLER_0_HOST_
MASK)
0: Interrupt Event triggers interrupt to
host processor
1: Masked
24.3.1.49 Host Processor Interrupt Routing Mask 31
(INT_AON_TIMER_MASK)
MEM Offset (00000000) 4C8h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0001_0001h
Bits Acce
ss
Type
Defaul
t
Description PowerW
ell
ResetSig
nal
31:1
7
RO 15'h00
00
RSVD (RSVD)
Reserved