Datasheet

System Control Subsystem
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 437
24.3.1.34 Host Processor Interrupt Routing Mask 4
(INT_SPI_SLV_MASK)
MEM Offset (00000000) 45Ch
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0001_0001h
Bits Access
Type
Default Description PowerWell ResetSignal
31:1
7
RO 15'h000
0
RSVD (RSVD)
Reserved
16 RW/P/L 1'b1 SPI Slave Host Halt interrupt
mask
(INT_SPI_SLV_HOST_HALT_
MASK)
0: Interrupt Event triggers a
warm reset or entry into probe
mode based on
P_STS.HALT_INT_REDIR
1: Masked
15:1 RO 15'h000
0
RSVD (RSVD)
Reserved
0 RW/P/L 1'b1 SPI Slave Host interrupt
mask
(INT_SPI_SLV_HOST_MASK)
0: Interrupt Event triggers
interrupt to host processor
1: Masked
24.3.1.35 Host Processor Interrupt Routing Mask 5
(INT_UART_0_MASK)
MEM Offset (00000000) 460h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0001_0001h
Bits Access
Type
Default Description PowerWell ResetSignal
31:17 RO 15'h0000 RSVD (RSVD)
Reserved