Datasheet
System Control Subsystem
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 435
Bits Access
Type
Default Description PowerWell ResetSignal
1 RW/1C/V/P 1'h0 Comparator status
clear register
(CMP_STAT_CLR_1)
The current status of the
latched value of the
comparator. Software
must clear the latch
before another interrupt.
Each Bit of This Register
Manages Over One Out of
Nineteen Comparators.
For Each Comparator:
1b: clear
0 RW/1C/V/P 1'h0 Comparator status
clear register
(CMP_STAT_CLR_0)
The current status of the
latched value of the
comparator. Software
must clear the latch
before another interrupt.
Each Bit of This Register
Manages Over One Out of
Nineteen Comparators.
For Each Comparator:
1b: clear
24.3.1.32 Host Processor Interrupt Routing Mask 0
(INT_I2C_MST_0_MASK)
MEM Offset (00000000) 448h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0001_0001h
Bits Access
Type
Default Description PowerWell ResetSignal
31:1
7
RO 15'h000
0
RSVD (RSVD)
Reserved
16 RW/P/L 1'b1 I2C Master 0 Host Halt
interrupt mask
(INT_I2C_MST_0_HOST_HAL
T_MASK)
0: Interrupt Event triggers a
warm reset or entry into probe
mode based on
P_STS.HALT_INT_REDIR
1: Masked