Datasheet

Interrupt Routing
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 395
23 Interrupt Routing
The Interrupt Routing consists of several elements:
1. Internal Host Processor Interrupts
2. SoC Interrupts with configurable routing to Processor
3. Capability for SoC Interrupts to trigger a Processor Halt for Debug
4. Capability for SoC Interrupts to trigger a Warm Reset
23.1 Interrupt Routing
23.1.1 Host Processor Interrupts
The Interrupt Vector Assignments for the Host Processor are described in Table 53:
Table 55. Host Processor Interrupt Vector Assignments
Vector No. Description Type
0 Divide Error Exception
1 Debug Exception Exception/Trap
2 NMI Interrupt Interrupt
3 Breakpoint Trap
4 Overflow Trap
5 BOUND Range Exceeded Exception
6 Invalid Opcode Exception
7 Device Not Available Exception
8 Double Fault Abort
9 Intel Reserved. N/A
10 Invalid TSS Exception
11 Segment Not Present Exception
12 Stack-Segment Fault Exception
13 General Protection Fault Exception
14 Intel Reserved. N/A
15 Intel Reserved. N/A
16 Intel Reserved. N/A
17 Alignment Check Exception
18-31 Intel Reserved. N/A
32-255 User Defined Interrupts Interrupt