Datasheet

Analog to Digital Convertor (ADC)
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 393
22.4.1.7 ADC FIFO Count Register (ADC_FIFO_COUNT)
MEM Offset (00000000) 34h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell ResetSignal
31:6 RO 26'h0000000 RSVD (RSVD)
Reserved
5:0 RO 6'h0 ADC FIFO Count
(FifoCount)
when read, this bit-field
contains the number of
samples stored in the ADC
FIFO. Writing has no
effect.
22.4.1.8 ADC Operating Mode Register (ADC_OP_MODE)
MEM Offset (00000000) 38h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0FA0h
Bits Access
Type
Default Description PowerWell ResetSignal
31:28 RO 4'h0 RSVD (RSVD)
Reserved
27 RW 1'h0 Interrupt Enable (IE)
writing a 1 to this bit enables
an interrupt at the
completion of the operating
mode change.
Reading this bit returns the
current interrupt enable
setting.
26:24 RW 3'h0 Enctrl - Enable Direct
Control (Enctrl)
writing a non-zero value
places the ADC into special
test mode. Set this field to
zero for normal operation.