Datasheet

Analog to Digital Convertor (ADC)
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 383
22 Analog to Digital Convertor
(ADC)
The SoC implements a Successive-Approximation (SAR) Analog to Digital Convertor
(ADC) which is capable of taking 19 single-ended analog inputs for conversion. ADC is
characterized to operate over the AVDD (1.8 to 3.6 V) analog input range.
22.1 Signal Descriptions
Please see Chapter 2, “Physical Interfaces” for additional details.
The signal description table has the following headings:
• Signal Name: The name of the signal/pin
• Direction: The buffer direction can be either input, output, or I/O
(bidirectional)
• Type: The buffer type found in Chapter 4, “Electrical Characteristics”
• Description: A brief explanation of the signal’s function
Table 53. Memory Signals
Signal Name Direction/
Type
Description
ADC[18:0] I Comparator/ADC inputs
22.2 Features
The following is a list of the ADC features:
• 19:1 multiplexed single-ended analog input channels, 6 high speed inputs and
13 low speed inputs.
• Selectable Resolution between 12, 10, 8 and 6-bit (12-bit at 2.28 MSps and 6
bits at 4 MSps).
o Max achievable sampling rate = (adc clock frequency) / (selres + 2).
• ADC Parameters:
o Differential Non-Linearity DNL = +/- 1.0 LSB
o Integral Non-Linearity INL = +/- 2.0 LSB
o SINAD = 68 dBFS
o Offset Error = +/- 2 LSB (calibration enabled), +/- 64 LSB (calibration
disabled)
• Latencies:
o Power-up time of <= 10 us
o 1 Conversion cycle = (resolution bits + 2) cycles
• Full-scale input range is 0 to AVDD.
o ADC Reference Voltage (Vrefp) of ADC HIP is connected to AVDD.