Datasheet

Comparators
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
382 Document Number: 333577-002EN
2) Clear CMP_STAT_CLR for each firing comparator by writing a ‘1’
If the external analog input generates a pulse matching polarity level of
CMP_REF_POL for sufficient duration greater than comparator’s propagation delay,
interrupt gets latched. If external input maintains its signal state to that of
CMP_REF_POL, interrupt persists and is not cleared even if CMP_STAT_CLR is applied.
The comparators are directly connected to the PMU logic in the always on domain of
the SOC. When a comparator activates the PMU will exit its low power wait or deep
sleep states. (See Power management
for more details)
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