Datasheet

Comparators
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 381
21.2 Features
The following is a list of comparator features:
2.0V 3.63V AVDD operation
1.2V 1.98V DVDD operation
Fast Asynchronous comparator
1 Positive and 2 negative inputs with selectable digital input
Rail to rail input range
CMPLP
o <3.8us propagation delay
o <600nA static current
o <10mV hysteresis (6 mV typ)
o <22nA power down current
CMPHP
o <0.25us propagation delay
o <9.8uA static current
o <6.8mV hysteresis (4.6 mV typ)
o <2.7nA power down current
21.3 Use
The 19 comparators can be used in the following ways
1) To generate an interrupt to the processor
2) To generate a wake event to cause the PMU to exit a deep sleep condition.
The following sequence should be applied setting up the comparator control to
generate an interrupt or wake event.
1) Set CMP_REF_SEL for each comparator
2) Set CMP_REF_POL for each comparator
3) Set CMP_PWR for each comparator to ‘1’
4) Set CMP_EN for each comparator to ‘1’
The comparator interrupt is a level triggered interrupt based on the polarity set in
CMP_REF_POL. It is not edge triggered. Interrupt is latched when external analog
input matches that of CMP_REF_POL and this latch is cleared using CMP_STAT_CLR.
Interrupt persists as long as the external source maintains its signal state as that of
CMP_REF_POL, and the particular comparator is enabled (CMP_EN[x]=1).
The following sequence should be used when responding to an interrupt having being
asserted.
1) Read CMP_STAT_CLR for each comparator