Datasheet

Real Time Clock (RTC)
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
376 Document Number: 333577-002EN
20.4.1.2 Current Match Register (RTC_CMR)
MEM Offset (B0000400) 4h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell
31:0 RW 32'h0 Current Match Register (RTC_CMR)
When the internal counter matches this
register and interrupt is generated, provided
interrupt generation is enabled
20.4.1.3 Counter Load Register (RTC_CLR)
MEM Offset (B0000400) 8h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell
31:0 RW 32'h0 Counter Load Register (RTC_CLR)
Loaded into the counter as the loaded value
which is written coherently