Datasheet

Ballout and Package Information
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 37
Item Description
GNDSENSE
Maximum total resistance (including wirebond, package pin
and board routing) between GNDSENSE and Ground plane
must be less than 400mΩ. This pin should be star connected
to the reference (GND) of the load circuit. No load current
should flow through this connection.
AVS
Maximum total resistance (including wirebond, package pin
and board routing) between AVS and Ground plane must be
less than 400mΩ/nb AVS pads. No other connections allowed
on this PAD.
VDD_CTRL
Maximum total resistance (including wirebond, package pin
and board routing) between VDD_CTRL pin and Input Supply
must be less than 20Ω. May be tied to VREG external node,
VOUT output or any other supply
DVDD
As small as possible
LX
Maximum total resistance (including wirebond, package pin
and board routing) between LX PIN and package Input Pin
must be less than 400mΩ/nb LX pins.
VOUT
Maximum total resistance (including internal wiring parasitic,
wirebond, package pin and board routing) between VREG pin
and the regulation point (VSENSE pin connection) must be
less than 20Ω.
C
IN
Must be placed within 0.2-0.4 inch of IC
C
out
Must be placed within 0.2-0.4 inch of IC
Package-Board Gnd
Inductance between package gnd plane and board gnd plane
< 1nH
When internal voltage regulator is disabled (VR_EN = 0), PVDD must be powered up,
GNDSENSE and AVS must be grounded. LX is HIZ, VSENSE to be grounded.
3.5.2 RTC Oscillator
For 32.768 kHz RTC Oscillator, refer to
http://www.murata.com/products/timingdevice/crystalu/technical/notice for PCB
guidelines.
Load capacitor on XTAL pins are integrated inside the chip but they are not adjustable.
A nominal value of 11 pF is on each pin (range: 6 pF minimum and 17 pF maximum).
If there is no RTC Oscillator need, then a platform need not mount RTC XTAL on board
and keep RTC_XTAL1, RTC_XTAL0 pins grounded.