Datasheet

Watchdog Timer
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 367
19.3.1.6 Interrupt Clear Register (WDT_EOI)
MEM Offset (B0000000) 14h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell
31:1 RO 31'h0 Reserved (RSVD1)
Reserved
0 RO 1'h0 Interrupt Clear Register (WDT_EOI)
Clears the watchdog interrupt. This can be
used to clear the interrupt without restarting
the watchdog counter
19.3.1.7 Component Parameters (WDT_COMP_PARAM_5)
Register Offset 0E4h
IntelRsvd True
Size 32 bits
Default 0000_0000h
PowerWell
Bits Access
Type
Default Description PowerWell
31:0 RO 0000_0000h RSVD (RSVD)
Reserved
19.3.1.8 Component Parameters (WDT_COMP_PARAM_4)
Register Offset 0E8h
IntelRsvd True
Size 32 bits
Default 0000_0000h
PowerWell
Bits Access
Type
Default Description PowerWell
31:0 RO 0000_0000h RSVD (RSVD)
Reserved