Datasheet

Watchdog Timer
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
362 Document Number: 333577-002EN
19 Watchdog Timer
The Watchdog Timer can be used to trigger a Warm Reset in the event that the SoC
has become unresponsive.
19.1 Features
The following is a list of the Watchdog (WDT) features:
Timer can be disabled (default state) or locked enabled (SoC Warm Reset
required to disable)
Selectable Timeout Value that ranges from 8us to ~60s (32MHz)
Capability to have a different initial Timeout Value versus the reload Timeout
Value
2 Timeout Response Modes as Follows:
o Request a SoC Warm Reset when a timeout occurs.
o Generate an Interrupt when a timeout occurs and if the Interrupt is
not serviced by the time a second timeout occurs then requests a SoC
Warm Reset.
19.1.1 WDT Enable
The WDT_CR.WDT_EN register field must be set to 1 to enable the WDT, once set to 1
the WDT_EN field can only be set back to 0 by an SoC Reset.
19.1.2 WDT Timeout Capabilities
The timer uses a 32-bit down-counter which is loaded with the programmed Timeout
Value.
The Initial Timeout Value is selected by the WDT_TORR.TOP_INIT register field (which
is fixed to 0), this value gets loaded into the timer when the WDT is first enabled. The
Reload Timeout Value is selected by the WDT_TORR.TOP register field, this value gets
loaded into the timer on subsequent reloads of the timer.
The values below are based off a 32 MHz System Clock and must be adjusted if the
frequency is adjusted (see Clocking Section).
Table 46. WDT Timeout Selection
TOP_INIT / TOP
Clock Cycles
Value (at 32MHz)
0
2
16
2.048ms
1
2
17
4.096ms
2
2
18
8.192ms
3
2
19
16.384ms
4
2
20
32.768ms
5
2
21
65.536ms
6
2
22
131.072ms