Datasheet

Timers and PWM
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 359
18.4.1.11 Timers Interrupt Status (TimersIntStatus)
MEM Offset (B0000800) 0B00008A0h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bit
s
Access
Type
Default Description PowerWel
l
ResetSign
al
31:
8
RO 24'h0 Reserved (RSVD1)
Reserved
7:0 RO 8'h0 Timers Interrupt Status
(TIMERS_INTERRUPT_STA
TUS)
A read of this register returns
the post masking interrupt
status of PWM/Timer's 0 to 7.
Bit corresponds to
PWM/Timer.
If reading from this register
outside of an interrupt service
routine, software should first
perform 2 dummy writes to
another PWM/Timer register.
18.4.1.12 Timers End Of Interrupt (TimersEOI)
MEM Offset (B0000800) 0B00008A4h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bit
s
Acces
s
Type
Defaul
t
Description PowerWe
ll
ResetSign
al
31:
8
RO 24'h0 Reserved (RSVD1)
Reserved
7:0 RO 8'h0 Timers End-of-Interrupt
Status
(TIMERS_END_OF_INTERRUP
T)
A read of this register returns all
0's, and clears all active
interrupts from all PWM/Timers.