Datasheet

General Purpose I/O (GPIO)
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
336 Document Number: 333577-002EN
17 General Purpose I/O (GPIO)
The SoC contains a single instance of the GPIO controller. The GPIO controller
provides a total of 25 GPIOs.
17.1 Signal Descriptions
Please see Chapter 2, “Physical Interfaces” for additional details.
The signal description table has the following headings:
• Signal Name: The name of the signal/pin
• Direction: The buffer direction can be either input, output, or I/O
(bidirectional)
• Type: The buffer type found in Chapter 4, “Electrical Characteristics”
• Description: A brief explanation of the signal’s function
Table 40. Memory Signals
Signal Name Direction/
Type
Description
GPIO[24:0] I/O
/IOVDD
General Purpose IO:
25 General Purpose IOs
NOTE: Signal Names are preliminary and are subject to changes when the “Physical Interfaces”
Chapter is populated.
17.2 Features
The following is a list of the GPIO controller features:
• 25 independently configurable GPIOs
• Separate data register bit and data direction control bit for each GPIO
• Metastability registers for GPIO read data
• Interrupt mode supported for all GPIOs, configurable as follows:
o Active High Level
o Active Low Level
o Rising Edge
o Falling Edge
o Both Edge
• Debounce logic for interrupt sources
17.3 Memory Mapped IO Registers
Registers listed are for GPIO, starting at base address B0000C00h.