Datasheet

DMA Controller
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 311
Bits Access
Type
Default Description PowerWell ResetSignal
10:7 RW 4'h0 Source hardware interface
(SRC_PER)
Assigns a hardware
handshaking interface (0-1)
to the channel source if the
CFG0_L.HS_SEL_SRC field is
0; otherwise, this field is
ignored. The channel can
then communicate with the
source peripheral connected
to that interface through the
assigned hardware
handshaking interface. NOTE:
For correct DMA operation,
only one peripheral (source
or destination) should be
assigned to the same
handshaking interface.
6 RW 1'b0 Source Status Update
Enable (SS_UPD_EN)
Source status information is
fetched only from the
location pointed to by the
SSTATAR0 register, stored in
the SSTAT0 register and
written out to the SSTAT0
location of the LLI if this field
is high
5 RW 1'b0 Destination Status Update
Enable (DS_UPD_EN)
Destination status
information is fetched only
from the location pointed to
by the DSTATAR0 register,
stored in the DSTAT0 register
and written out to the
DSTAT0 location of the LLI if
this field is high
4:2 RW 3'b001 AHB bus protocol bus
control (PROTCTL)
Protection Control bits used
to drive the AHB HPROT[3:1]
bus.