Datasheet

DMA Controller
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 309
Bits Access
Type
Default Description PowerWell ResetSignal
17:12 RO 6'b0 Reserved (RSV1)
11 RW 1'b1 Source Handshake select
(HS_SEL_SRC)
Used to select which
handshake interface is active
for source requests on this
channel
0 = HW handshake. SW ones
are ignored
1 = SW handshake. HW ones
are ignored
If source peripheral is
memory this bit is ignored
10 RW 1'b1 Destination Handshake
select (HS_SEL_DST)
Used to select which
handshake interface is active
for destination requests on
this channel
0 = HW handshake. SW ones
are ignored
1 = SW handshake. HW ones
are ignored
If destination peripheral is
memory this bit is ignored
9 RO 1'b1 Channel FIFO empty
status (FIFO_EMPTY)
Indicates if there is data left
in the channel FIFO. Can be
used in conjunction with
CH_SUSP to cleanly disable a
channel.
1 = Channel FIFO empty
0 = Channel FIFO not empty
8 RW 1'b0 Channel Suspend control
(CH_SUSP)
Suspends all DMA data
transfers from the source
until this bit is cleared. There
is no guarantee that the
current transaction will
complete. Can also be used
in conjunction with
FIFO_EMPTY to cleanly
disable a channel without
losing any data.
0 = Not suspended.