Datasheet

SPI
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 237
Bits Access
Type
Default Description PowerWell ResetSignal
2 RW/L 1'h0 Microwire Hanshaking
(MHS)
Relevant only when the SPI
Controller is configured as a
serial-master device. When
configured as a serial slave,
this bit field has no
functionality. Used to enable
and disable the 'busy/ready'
handshaking interface for the
Microwire protocol. When
enabled, the SPI Controller
checks for a ready status from
the target slave, after the
transfer of the last
data/control bit, before
clearing the BUSY status in the
SR register.
0: handshaking interface is
disabled
1: handshaking interface is
enabled
1 RW/L 1'h0 Microwire Control Register
(MDD)
Defines the direction of the
data word when the Microwire
serial protocol is used. When
this bit is set to 0, the data
word is received by the SPI
Controller MacroCell from the
external serial device. When
this bit is set to 1, the data
word is transmitted from the
SPI Controller MacroCell to the
external serial device.
0 RW/L 1'h0 Microwire Transfer Mode
(MWMOD)
Defines whether the Microwire
transfer is sequential or non-
sequential. When sequential
mode is used, only one control
word is needed to transmit or
receive a block of data words.
When non-sequential mode is
used, there must be a control
word for each data word that
is transmitted or received.
0 : non-sequential transfer
1 : sequential transfer