Datasheet

UART
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 221
Bits Access
Type
Default Description PowerWell ResetSignal
7:0 RW 8'h0 DE assertion time
(DE_assertion_time)
DE signal assertion time. This
field controls the amount of
time (in terms of number of
serial clock periods) between
the assertion of rising edge of
Driver output enable signal to
serial transmit enable. Any
data in transmit buffer, will
start on serial output (sout)
after the transmit enable.
14.3.1.16 TurnAround Timing Register (TAT)
TurnAround Timing Register.
MEM Offset (B0002000) 0B00020BCh
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell ResetSignal
31:16 RW 16'b0 DE to RE (RE_to_DE)
Driver Enable to Receiver
Enable TurnAround time.
Turnaround time (in terms of
serial clock) for DE de-
assertion to RE assertion.
15:0 RW 16'h0 DE to RE (DE_to_RE)
Driver Enable to Receiver
Enable TurnAround time.
Turnaround time (in terms of
serial clock) for DE de-
assertion to RE assertion.