Datasheet

UART
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 217
14.3.1.11 DMA Software Acknowledge (DMASA)
DMA software acknowledge if a transfer needs to be terminated due to an error
condition.
MEM Offset (B0002000) 0B00020A8h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell ResetSignal
31:1 RO 31'b0 Reserved (RSV)
0 RW 1'h0 DMA Software
Acknowledge (DMASA)
Used to perform DMA software
acknowledge if a transfer
needs to be terminated due to
an error condition. For
example, if the DMA disables
the channel, then the UART
should clear its request. This
will cause the TX request, TX
single, RX request and RX
single signals to de-assert.
Note that this bit is 'self-
clearing' and it is not
necessary to clear this bit.
14.3.1.12 Transceiver Control Register (TCR)
Transceiver Control Register.
MEM Offset (B0002000) 0B00020ACh
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0006h
Bits Access
Type
Default Description PowerWell ResetSignal
31:5 RO 27'b0 Reserved (RSV)
4:3 RW 2'h0 Transfer Mode
(XFER_MODE)
Transfer Mode