Datasheet

UART
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
216 Document Number: 333577-002EN
Bits Access
Type
Default Description PowerWell ResetSignal
0 RO 1'h0 Reserved (RSV0)
14.3.1.10 Halt Transmission (HTX)
Halt Transmission.
MEM Offset (B0002000) 0B00020A4h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell ResetSignal
31:1 RO 31'b0 Reserved (RSV)
0 RW 1'h0 Halt Transmission (HTX)
Used to halt transmissions for
testing, so that the transmit
FIFO can be filled by the
master when FIFO's are
enabled. Note, if FIFO's are
not enabled the setting of the
halt TX register will have no
effect on operation.
0 = Halt TX disabled
1 = Halt TX enabled