Datasheet
UART
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 205
Bits Access
Type
Default Description PowerWell ResetSignal
Note that in Loopback mode
(MCR[4] set to one), the
out2_n output is held inactive
high while the value of this
location is internally looped
back to an input.
2 RW 1'h0 User designated Output 1
(OUT1)
Used to directly control the
user-designated Output1
(out1_n) output. The value
written to this location is
inverted and driven out on
out1_n, that is:
0 = out1_n de-asserted (logic
1)
1 = out1_n asserted (logic 0)
Note that in Loopback mode
(MCR[4] set to one), the
out1_n output is held inactive
high while the value of this
location is internally looped
back to an input.
1 RW 1'h0 Request to Send (RTS)
Used to directly control the
Request to Send (rts_n)
output. The Request To Send
(rts_n) output is used to
inform the modem or data set
that the UART is ready to
exchange data. When Auto
RTS Flow Control is not
enabled (MCR[5] set to zero),
the rts_n signal is set low by
programming MCR[1] (RTS) to
a high. In Auto Flow Control,
MCR[5] set to one and FIFO's
enable (FCR[0] set to one, the
rts_n output is controlled in
the same way, but is also
gated with the receiver FIFO
threshold trigger (rts_n is
inactive high when above the
threshold). The rts_n signal
will be de-asserted when
MCR[1] is set low. Note that in
Loopback mode (MCR[4] set
to one), the rts_n output is
held inactive high while the
value of this location is
internally looped back to an
input.