Datasheet

UART
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
198 Document Number: 333577-002EN
14.3.1.2 Interrupt Enable / Divisor Latch High (IER_DLH)
Interrupt Enable Register (IER), when the DLAB bit is zero; Divisor Latch High (DLH),
when the DLAB bit is one.
MEM Offset (B0002000) 0B0002004h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell ResetSignal
31:8 RO 24'b0 Reserved (RSV)
7:0 RW 8'h00 Interrupt Enable / Divisor
Latch High (FIELD)
Different UART registers are
accessed depending on the
Line control Register (LCR)
DLAB bit value.
IER, Interrupt Enable Register
Access - Read/write AND DLAB
(LCR[7]) =0
Interrupt Enable Register:
Each of the bits used has a
different function ( 0 =
disabled 1 = enabled):
0 ERBFI, Enable Received Data
Available Interrupt
1 ETBEI, Enable Transmit
Holding Register Empty
Interrupt
2 ELSI, Enable Receiver Line
Status Interrupt
3 EDSSI, Enable Modem
Status Interrupt
4 RESERVED
5 RESERVED
6 RESERVED
7 PTIME, Programmable THRE
Interrupt Mode Enable
DLH, Divisor Latch (High)
Access - Read/write AND DLAB
(LCR[7]) =1