Datasheet
UART
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 197
Bits Access
Type
Default Description PowerWell ResetSignal
Data byte received on the
serial input port (sin) in UART
mode, or the serial infrared
input (sir_in) in infrared mode.
The data in this register is
valid only if the Data Ready
(DR) bit in the Line Status
Register (LSR) is set
THR, Transmit Holding
Register.
Access - Write AND DLAB
(LCR[7]) =0
Data to be transmitted on the
serial output port (sout) in
UART mode or the serial
infrared output (sir_out_n) in
infrared mode. Data should
only be written to the THR
when the THR Empty (THRE)
bit (LSR[5]) is set.
DLL, Lower part of the Divisor
Latch.
Access - Read/Write AND
DLAB (LCR[7]) =1
Lower 8 bits of a 16-bit,
read/write, Divisor Latch
register that contains the baud
rate divisor for the UART. This
register may be accessed only
when the DLAB bit (LCR[7]) is
set. Note that with the Divisor
Latch Registers (DLL and DLH)
set to zero, the baud clock is
disabled and no serial
communications occur. Also,
once the DLL is set, at least 8
clock cycles of sclk should be
allowed to pass before
transmitting or receiving data.