Datasheet

UART
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
194 Document Number: 333577-002EN
Signal Name Direction/
Type
Description
UART_B_DE Logic
Output
UART B Driver Enable (RS485 mode). Used to
control the differential driver of RS485 in
platform/board. This is multiplexed onto
UART_B_RTS pin depending on RS485 or RS232
mode of operation.
UART_B_RE Logic
Output
UART A Receiver Enable (RS485 mode). Used to
control the differential receiver of RS485 in
platform/board. This is multiplexed onto
UART_B_CTS pin depending on RS485 or RS232
mode of operation.
14.2 Features
Both UART instances are configured identically, the following is a list of the UART
controller features:
Operation compliant with the 16550 Standard
o Start bit
o 5 to 9 bits of Data
o Optional Parity bit (Odd or Even)
o 1, 1.5 or 2 Stop bits
Baud Rate configurability between 300 baud and 2M baud.
o Maximum baud rate is limited by system clock frequency divided by
16.
o Supported baud rates:
300, 1200, 2400, 4800, 9600, 14400, 19200,
38400, 57600, 76800, 115200; multiples of 38.4kbps and multiples of
115.2kbps upto 2M baud
Auto Flow Control mode as specified in the 16750 Standard
Hardware Flow Control
Software Flow Control (when Hardware Flow Control is disabled)
Hardware Handshake Interface to support DMA capability
Interrupt Control
FIFO support with 16B TX and RX FIFO’s
Support of RS485
o Differential driver/receiver is external to SoC.
o Driver enable (DE) and Receiver enable (RE) outputs are driven from
SoC to control the differential driver/receiver.
Fractional clock divider that ensures less than 2% frequency error for most
supported baud rates.
o Fraction resolution is 4-bits.
o Exception: 2.07% error for 1.391 Mbaud, 2.12% for 1.882 Mbaud and
2Mbaud, 2.53% error for 1.684 Mbaud.
9-bit data transfer mode to support multi-drop system where one master is
connected to multiple slaves in a system