Datasheet

I2C
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
184 Document Number: 333577-002EN
Bits Acces
s Type
Defaul
t
Description PowerWel
l
ResetSigna
l
Set if master is in 10-bit
address mode and the second
address byte of the 10-bit
address was not
acknowledged by any slave.
1 RO 1'b0 10 Bit Address First Not
Acknowledged
(ABRT_10ADDR1_NOACK)
Set if master is in 10-bit
address mode and the first
10-bit address byte was not
acknowledged by any slave.
0 RO 1'b0 7 Bit Address Not
Acknowledged
(ABRT_7B_ADDR_NOACK)
Set if master is in 7-bit
addressing mode and the
address sent was not
acknowledged by any slave.
13.3.1.34 SDA Setup (IC_DMA_CR)
The register is used to enable the DMA Controller interface operation. There is a
separate bit for transmit and receive. This can be programmed regardless of the state
of IC_ENABLE.
MEM Offset () 0B0002888h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell ResetSignal
31:2 RO 30'b0 Reserved (RSV)
1 RW 1'h0 Transmit DMA Enable.
(TDMAE)
This bit enables/disables the
transmit FIFO DMA channel.
0b: Transmit DMA disabled
1b: Transmit DMA enabled
0 RW 1'b0 Receive DMA Enable
(RDMAE)
This bit enables/disables the
receive FIFO DMA channel.
0b: Receive DMA disabled
1b: Receive DMA enabled