Datasheet

I2C
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
174 Document Number: 333577-002EN
Bits Access
Type
Default Description PowerWell ResetSignal
0 RO 1'b0 Clear ACTIVITY
(CLR_TX_ABRT)
Reading this register clears
the ACTIVITY interrupt if the
I2C is not active anymore. If
the I2C module is still active
on the bus, the ACTIVITY
interrupt bit continues to be
set. It is automatically cleared
by hardware if the module is
disabled and if there is no
further activity on the bus.
The value read from this
register to get status of the
ACTIVITY interrupt (bit 8) of
the IC_RAW_INTR_STAT.
13.3.1.25 Clear STOP_DET Interrupt (IC_CLR_STOP_DET)
Clear a single interrupt type.
MEM Offset () 0B0002860h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell ResetSignal
31:1 RO 31'b0 Reserved (RSV)
0 RO 1'b0 Clear STOP_DET
(CLR_STOP_DET)
Read this register to clear the
STOP_DET interrupt (bit 9) of
the IC_RAW_INTR_STAT.
13.3.1.26 Clear START_DET Interrupt (IC_CLR_START_DET)
Clear a single interrupt type.
MEM Offset () 0B0002864h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h