Datasheet

I2C
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 173
Bits Access
Type
Default Description PowerWell ResetSignal
Read this register to clear the
TX_ABRT interrupt (bit 6) of
the IC_RAW_INTR_STAT
register, and the
IC_TX_ABRT_SOURCE
register. This also releases the
TX FIFO from the flushed/reset
state, allowing more writes to
the TX FIFO. Refer to Bit 9 of
the IC_TX_ABRT_SOURCE
register for an exception to
clearing
IC_TX_ABRT_SOURCE.
13.3.1.23 Clear RX_DONE Interrupt (IC_CLR_RX_DONE)
Clear a single interrupt type.
MEM Offset () 0B0002858h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell ResetSignal
31:1 RO 31'b0 Reserved (RSV)
0 RO 1'b0 Clear RX_DONE
(CLR_RX_DONE)
Read this register to clear the
RX_DONE interrupt (bit 7) of
the IC_RAW_INTR_STAT.
13.3.1.24 Clear ACTIVITY Interrupt (IC_CLR_ACTIVITY)
Clear a single interrupt type.
MEM Offset () 0B000285Ch
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell ResetSignal
31:1 RO 31'b0 Reserved (RSV)