Datasheet

I2C
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
172 Document Number: 333577-002EN
Bits Access
Type
Default Description PowerWell ResetSignal
31:1 RO 31'b0 Reserved (RSV)
0 RO 1'b0 Clear TX_OVER
(CLR_TX_OVER)
Read this register to clear the
TX_OVER interrupt (bit 3) of
the IC_RAW_INTR_STAT.
13.3.1.21 Clear RD_REQ Interrupt (IC_CLR_RD_REQ)
Clear a single interrupt type.
MEM Offset () 0B0002850h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell ResetSignal
31:1 RO 31'b0 Reserved (RSV)
0 RO 1'b0 Clear RD_REQ
(CLR_RD_REQ)
Read this register to clear the
RD_REQ interrupt (bit 5) of
the IC_RAW_INTR_STAT.
13.3.1.22 Clear TX_ABRT Interrupt (IC_CLR_TX_ABRT)
Clear a single interrupt type.
MEM Offset () 0B0002854h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell ResetSignal
31:1 RO 31'b0 Reserved (RSV)
0 RO 1'b0 Clear TX_ABRT
(CLR_TX_ABRT)