Datasheet

I2C
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
170 Document Number: 333577-002EN
Bits Access
Type
Default Description PowerWell ResetSignal
The valid range is 0-255, with
the additional restriction that
it may not be set to value
larger than the depth of the
buffer. If an attempt is made
to do that, the actual value set
will be the maximum depth of
the buffer. A value of 0 sets
the threshold for 0 entries,
and a value of 255 sets the
threshold for 255 entries.
13.3.1.17 Clear Combined and Individual Interrupt
(IC_CLR_INTR)
Read this register to clear the combined interrupt, all individual interrupts, and the
IC_TX_ABRT_SOURCE register.
MEM Offset () 0B0002840h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell ResetSignal
31:1 RO 31'b0 Reserved (RSV)
0 RO 1'b0 Clear Combined and
Individual Interrupt
(CLR_INTR)
This bit does not clear
hardware clearable interrupts
but software clearable
interrupts. Refer to Bit 9 of the
IC_TX_ABRT_SOURCE register
for an exception to clearing
IC_TX_ABRT_SOURCE.