Datasheet

Introduction
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 17
1.1 Feature Overview
1.1.1 Clock Oscillators
• 32 MHz Clock (system clock) generated by on-die Hybrid Oscillator which
works in either:
o Silicon mode (external crystal not needed) (generates 4/8/16/32 MHz
clock output as configured) or
o Crystal mode (external 32MHz crystal required).
• 32.768 kHz RTC Clock generated by on-die RTC Crystal oscillator (external
32.768kHz crystal required). SoC is designed to work without RTC clock, if
there is no use-case for RTC clock.
1.1.2 Quark Processor Core
• 32 MHz Clock Frequency
• 32-bit Address Bus
• Pentium 586 ISA Compatible without x87 Floating Point Unit
• Integrated Local APIC and I/O APIC
• 1 32-bit timer in Local APIC running with system/core clock
1.1.3 Memory Subsystem
• 32 KB of 64b wide on-die Flash
• Supports Page Erase and Program cycles
• Supports configurable wait states to allow Flash to run at various frequencies. At
32MHz, 2-wait-states are introduced for all accesses
• 4 configurable Protection regions for Flash access control
• 8 KB Code OTP with independent read-disable of the two 4KB regions
• 4 KB Data OTP (One-time-programmable) memory
• 8 KB of on-die SRAM with 64b interface with 0-wait state in case of no arbitration
conflict
• 4 configurable Protection regions for SRAM access control
1.1.4 I
2
C
• One I
2
C Interface
• Three I
2
C speeds supported : Standard Mode (100 Kbps), Fast Mode (400 Kbps)
and Fast Mode Plus (1 Mbps)
• 7-bit and 10-bit Addressing Modes Supported
• Supports Master or Slave operation
• FIFO mode support (16B TX and RX FIFO’s)
• Supports HW DMA with configurable FIFO thresholds
1.1.5 UART
• Two 16550 compliant UART interfaces
• Supports baud rates from 300 to 2M with less than 2% frequency error
• Support for hardware and software flow control
• FIFO mode support (16B TX and RX FIFO’s)