Datasheet

I2C
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 169
13.3.1.15 Receive FIFO Threshold Level (IC_RX_TL)
Controls the level of entries (or above) that triggers the RX_FULL interrupt (bit 2 in
IC_RAW_INTR_STAT register).
MEM Offset () 0B0002838h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_000Fh
Bits Access
Type
Default Description PowerWell ResetSignal
31:4 RO 28'b0 Reserved (RSV)
3:0 RW 4'hF Receive FIFO Threshold
Level (RX_TL)
The valid range is 0-255, with
the additional restriction that
hardware does not allow this
value to be set to a value
larger than the depth of the
buffer. If an attempt is made
to do that, the actual value set
will be the maximum depth of
the buffer. A value of 0 sets
the threshold for 1 entry, and
a value of 255 sets the
threshold for 256 entries.
13.3.1.16 Transmit FIFO Threshold Level (IC_TX_TL)
Controls the level of entries (or below) that trigger the TX_EMPTY interrupt (bit 4 in
IC_RAW_INTR_STAT register).
MEM Offset () 0B000283Ch
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell ResetSignal
31:4 RO 28'b0 Reserved (RSV)
3:0 RW 4'h0 Transmit FIFO Threshold
Level (TX_TL)