Datasheet

I2C
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
154 Document Number: 333577-002EN
Bits Access
Type
Default Description PowerWell ResetSignal
The minimum valid value is
6; hardware prevents values
less than this being written,
and if attempted results in 6
being set.
13.3.1.9 Fast Speed I2C Clock SCL Low Count
(IC_FS_SCL_LCNT)
Sets the SCL clock low-period count for fast speed (FS). Can be written only when the
I2C is disabled (IC_ENABLE==0). Writes at other times have no effect.
MEM Offset () 0B0002820h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0082h
Bits Access
Type
Default Description PowerWell ResetSignal
31:16 RO 16'b0 Reserved (RSV)
15:0 RW 16'h0082 SS SCL clock low-period
count (IC_FS_SCL_LCNT)
Must be set before any I2C
bus transaction can take
place to ensure proper I/O
timing.
The minimum valid value is
8; hardware prevents values
less than this being written,
and if attempted results in 8
being set.