Datasheet

Memory Subsystem
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
136 Document Number: 333577-002EN
Bits Access
Type
Default Description PowerWell
22:20 RW/L 3'b0 MPR Write Access Allow (WR_ALLOW)
Enable Write Access on an Agent by Agent
basis:
Bit [0] : Enables Write Access for the Host
Processor
Bit [1] : Reserved
Bit [2] : Enables Write Access for DMA
19:17 RO 3'b0 RSV2 (RSV2)
Reserved
16:10 RW/L 7'b0 MPR Upper Bound (UPR_BOUND)
The Upper Address Bound is compared with
16:10 of the incoming address determine the
upper 1KB aligned value of the Protected
Region.
Upper 4 bits are unused by HW. For address
comparison purposes, lower address bits[9:0]
of incoming address is assumed to be all 1’s.
So, incoming address is checked for less
than or equal to this field.
9:7 RO 3'b0 RSV1 (RSV1)
Reserved
6:0 RW/L 7'b0 MPR Lower Bound (LWR_BOUND)
The Lower Address Bound is compared with
16:10 of the incoming address determine the
lower 1KB aligned value of the Protected
Region.
Upper 4 bits are unused by HW. For address
comparison purposes, lower address bits[9:0]
of incoming address is assumed to be all 0’s.
So, incoming address is checked for greater
than or equal to this field.
12.4.4.3 MPR_CFG (MPR2_CFG)
Memory Protection Region Configuration Register
MEM Offset (B0400000) 8h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_0000h
Bits Access
Type
Default Description PowerWell
31 RW/1S 1'b0 MPR Lock (LOCK)
Lock the Memory Protection Region
Configuration