Datasheet

Memory Subsystem
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 119
o Since prefetcher depth is only 128b and a long sequence of operations need
to be performed to program flash memory, LMT’s prefetcher cannot contain
stale instructions.
• Interaction of LMT’s instruction prefetcher vs Flash memory updates: From Intel
®
Quark™ microcontroller D2000’s usage model perspective, the routines to
program/erase flash memory are part of boot code. It is an illegal usage model to
modify this boot code while simultaneously executing from it. Hence, this is not a
concern.
12.3.2 Miscellaneous Memory Ordering related Scenarios
Intel
®
Quark™ microcontroller D2000 has registers on AHB fabric that can alter
configurations of various functions of SoC. Some examples are:
• Flash Latency: These fields can be changed by SW to alter flash latency dynamically
based on SoC clock frequency.
• Flash Program/Erase operation: Program/Erase is under SW control.
• System Clock/Oscillator Control: SW can power down the main oscillator and go to
deep-sleep state only to be woken up by an external wake event via analog
comparator input. The wake event requires no SoC clock and it enables the system
clock/oscillator.