Datasheet

Memory Subsystem
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 117
o No locked transaction support.
o One fabric interface for every master and slave.
• DMA
o Separate Master and Slave interfaces on AHB interface
o No write posting support i.e. all writes are non-posted.
• Slave Peripherals
o Examples: UART, I2C, SPIC, etc.
o No write posting support i.e. all writes are non-posted.
o Single AHB slave interface to each peripheral.
• SCSS Configuration Registers
o Control SoC configuration related to Clocks, Power Management, etc.
o Reside on AHB fabric on a single AHB slave interface
12.3.1 Producer/Consumer Model Analysis of the Memory
Subsystem
Flash Memory is a special case and is discussed later.
From standard Producer/Consumer model perspective, producer produces data,
producer writes/triggers flag, consumer reads/receives flag, and consumer consumes
data. Goal is to ensure consumer’s data is consistent.
• Producers can be: DMA, LMT
• Consumers can be: DMA, LMT
• Data can reside in: SRAM, AHB (DMA/Registers on AHB fabric)
• Flag: LMT Interrupt, SRAM, AHB (DMA/Registers on AHB fabric)
The following scenario combinations are possible and analyzed – some of them are
illegal use models but analyzed for completeness.
Producer
Consumer
Data
Flag
Analysis
DMA DMA
SRAM,
AHB
SRAM,
AHB or
LMT
Interrupt
DMA is in-order and does no write-
posting. AHB fabric is in-
order. All
writes in AHB fabric are non-posted.
Hence, no memory consistency
concerns.
DMA LMT
SRAM
SRAM,
AHB or
LMT
Interrupt
DMA is in-order and does no write-
posting. AHB fabric is in-
order. All
writes in AHB fabric are non-posted.
Hence, when DMA completes, data is
guaranteed to be present in SRAM.
So when LMT reads SRAM via DTCM
interface, data is consistent.
AHB
SRAM,
AHB or
LMT
Interrupt
DMA is in-order and does no write-
posting. AHB fabric is in-
order. All
writes in AHB fabric are non-posted.
Hence, when DMA completes, data is
guaranteed to be present in AHB. So
when LMT reads flag on SRAM and
then reads data via AHB interface,
data is consistent.