Datasheet

Memory Subsystem
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
108 Document Number: 333577-002EN
• Support a scan mode where all the Flash control signals are gated during
scan.
The FPR registers reside in the Flash Controller Configuration Registers.
The previously described protection is applied for ITCM requests also.
12.1.2 OTP Features
- 8KB OTP:
o Implemented using the information memory region of Flash.
o Part of Processor’s Instruction address space (ITCM).
o Supports 64b wide reads via ITCM Interface.
o Supports 32 bit wide reads via an AHB Lite Interface.
o A Rotated Priority access scheme is used to arbitrate between the
ITCM Interface and the AHB Lite Interface.
o Write, page erase and erase reference cell supported as per section
12.1.1 before the region is programmed as OTP.
o Wait state behavior as per section 12.1.1 and same as Code Flash.
o Supports a hardware lock mechanism to prevent writes to and erases
of OTP. If bit 0 of offset 0x0 of the information memory region of Flash
is 0b, then OTP region is considered programmed and hardware blocks
all writes/erases of information memory.
o An upper and lower lock bit to disable reads to the upper 4KB and
lower 4KB regions of Flash. The register lock bits can only be cleared
after a warm reset.
o When an Access Violation occurs a Violation Event trigger (Interrupt)
is asserted and the following information is logged: The Agent, the
Address and the Transfer Type (ROM RD).
o Mass Erase capability is disabled by HW once 8KB OTP has been
programmed.
- 4KB OTP:
o There is a limitation of max 8KB of information memory inside a flash
device. Hence, 4KB OTP is implemented using the Main Memory block
of Flash. Remaining 32KB of Main Memory block is used for instruction
code.
o Not part of either of Processor’s ITCM or DTCM address spaces and
accessed by Processor over AHB-Lite interface.
o Transparent to HW and entirely managed by FW using FPR.
o Access control is enforced via FPR.
o Supports 32 bit wide reads via an AHB Lite Interface.
o A Rotated Priority access scheme is used to arbitrate between the
ITCM Interface and the AHB Lite Interface.
o FW must not issue Mass Erase once 4KB OTP has been programmed.