Datasheet

Dual-Core Intel® Xeon® Processor 7100 Series Datasheet 51
Pin Listing
DBSY# F18 Common Clk Input/Output
DEFER# C23 Common Clk Input
DEP0# AD31 Source Sync Input/Output
DEP1# AD30 Source Sync Input/Output
DEP2# AE16 Source Sync Input/Output
DEP3# AE15 Source Sync Input/Output
DEP4# AE8 Source Sync Input/Output
DEP5# AD6 Source Sync Input/Output
DEP6# AC4 Source Sync Input/Output
DEP7# AA4 Source Sync Input/Output
DP0# AC18 Common Clk Input/Output
DP1# AE19 Common Clk Input/Output
DP2# AC15 Common Clk Input/Output
DP3# AE17 Common Clk Input/Output
DRDY# E18 Common Clk Input/Output
DSTBN0# Y21 Source Sync Input/Output
DSTBN1# Y18 Source Sync Input/Output
DSTBN2# Y15 Source Sync Input/Output
DSTBN3# Y12 Source Sync Input/Output
DSTBP0# Y20 Source Sync Input/Output
DSTBP1# Y17 Source Sync Input/Output
DSTBP2# Y14 Source Sync Input/Output
DSTBP3# Y11 Source Sync Input/Output
Don’t Care B4
Don’t Care A4
Don’t Care C1
Don’t Care C5
Don’t Care AC1
Don’t Care AC30
Don’t Care AE2
Don’t Care AE3
FERR#/PBE# E27 Async GTL+ Output
FORCEPR# A15 Power/Other Input
GTLREF0 W23 Power/Other Input
GTLREF1 W9 Power/Other Input
GTLREF2 F23 Power/Other Input
GTLREF3 F9 Power/Other Input
HIT# E22 Common Clk Input/Output
HITM# A23 Common Clk Input/Output
ID0# A26 Common Clk Input
Table 4-1. Pin Listing by Pin Name
(Sheet 5 of 16)
Pin Name Pin No.
Signal Buffer
Type
Direction
ID1# B26 Common Clk Input
ID2# D25 Common Clk Input
ID3# D27 Common Clk Input
ID4# C28 Common Clk Input
ID5# B29 Common Clk Input
ID6# B30 Common Clk Input
ID7# A30 Common Clk Input
IDS# A28 Common Clk Input
IERR# E5 Async GTL+ Output
IGNNE# C26 Async GTL+ Input
INIT# D6 Async GTL+ Input
LINT0/INTR B24 Async GTL+ Input
LINT1/NMI G23 Async GTL+ Input
LOCK# A17 Common Clk Input/Output
MCERR# D7 Common Clk Input/Output
ODTEN B5 Power/Other Input
OOD# D29 Common Clk Input
PROCHOT# B25 Async GTL+ Output
PWRGOOD AB7 Async GTL+ Input
REQ0# B19 Source Sync Input/Output
REQ1# B21 Source Sync Input/Output
REQ2# C21 Source Sync Input/Output
REQ3# C20 Source Sync Input/Output
REQ4# B22 Source Sync Input/Output
Reserved A31
Reserved E16
Reserved W3
Reserved Y27
Reserved Y28
Reserved AE30
RESET# Y8 Common Clk Input
RS0# E21 Common Clk Input
RS1# D22 Common Clk Input
RS2# F21 Common Clk Input
RSP# C6 Common Clk Input
SKTOCC# A3 Power/Other Output
SM_ALERT# AD28 SMBus Output
SM_CLK AC28 SMBus Input
SM_DAT AC29 SMBus Input/Output
SM_EP_A0 AA29 SMBus Input
Table 4-1. Pin Listing by Pin Name
(Sheet 6 of 16)
Pin Name Pin No.
Signal Buffer
Type
Direction