Datasheet

Dual-Core Intel® Xeon® Processor 7100 Series Datasheet 49
Pin Listing
4 Pin Listing
4.1 Dual-Core Intel® Xeon® Processor 7100 Series
Pin Assignments
Section 2.6 contains the front side bus signal groups for the Dual-Core Intel Xeon
processor 7100 series (see Tab l e 2-6 ). This section provides a sorted pin list in
Ta b l e 4 - 1 and Tab l e 4-2 . Tab l e 4-1 is a listing of all processor pins ordered
alphabetically by pin name. Ta bl e 4 - 2 is a listing of all processor pins ordered by pin
number.
4.1.1 Pin Listing by Pin Name
Table 4-1. Pin Listing by Pin Name
(Sheet 1 of 16)
Pin Name Pin No.
Signal Buffer
Type
Direction
A3# A22 Source Sync Input/Output
A4# A20 Source Sync Input/Output
A5# B18 Source Sync Input/Output
A6# C18 Source Sync Input/Output
A7# A19 Source Sync Input/Output
A8# C17 Source Sync Input/Output
A9# D17 Source Sync Input/Output
A10# A13 Source Sync Input/Output
A11# B16 Source Sync Input/Output
A12# B14 Source Sync Input/Output
A13# B13 Source Sync Input/Output
A14# A12 Source Sync Input/Output
A15# C15 Source Sync Input/Output
A16# C14 Source Sync Input/Output
A17# D16 Source Sync Input/Output
A18# D15 Source Sync Input/Output
A19# F15 Source Sync Input/Output
A20# A10 Source Sync Input/Output
A21# B10 Source Sync Input/Output
A22# B11 Source Sync Input/Output
A23# C12 Source Sync Input/Output
A24# E14 Source Sync Input/Output
A25# D13 Source Sync Input/Output
A26# A9 Source Sync Input/Output
A27# B8 Source Sync Input/Output
A28# E13 Source Sync Input/Output
A29# D12 Source Sync Input/Output
A30# C11 Source Sync Input/Output
A31# B7 Source Sync Input/Output
A32# A6 Source Sync Input/Output
A33# A7 Source Sync Input/Output
A34# C9 Source Sync Input/Output
A35# C8 Source Sync Source Sync
A36# F16 Source Sync Source Sync
A37# F22 Source Sync Source Sync
A38# B6 Source Sync Source Sync
A39# C16 Source Sync Source Sync
A20M# F27 Async GTL+ Input
ADS# D19 Common Clk Input/Output
ADSTB0# F17 Source Sync Input/Output
ADSTB1# F14 Source Sync Input/Output
AP0# E10 Common Clk Input/Output
AP1# D9 Common Clk Input/Output
BCLK0 Y4 FSB Clk Input
BCLK1 W5 FSB Clk Input
BINIT# F11 Common Clk Input/Output
BNR# F20 Common Clk Input/Output
BOOT_SELECT G7 Power/Other Input
BPM0# F6 Common Clk Input/Output
BPM1# F8 Common Clk Input/Output
BPM2# E7 Common Clk Input/Output
BPM3# F5 Common Clk Input/Output
BPM4# E8 Common Clk Input/Output
BPM5# E4 Common Clk Input/Output
Table 4-1. Pin Listing by Pin Name
(Sheet 2 of 16)
Pin Name Pin No.
Signal Buffer
Type
Direction