Datasheet

Electrical Specifications
22 Dual-Core Intel® Xeon® Processor 7100 Series Datasheet
2.3 Cache Voltage Identification (CVID)
The CVID[3:0] pins supply the encodings that determine the voltage to be supplied by
the V
CACHE
(the L3 cache voltage for the Dual-Core Intel Xeon processor 7100 series)
voltage regulator. The CVID specification for the Dual-Core Intel Xeon processor 7100
Table 2-4. Voltage Identification (VID) Definition
VID5 VID4 VID3 VID2 VID1 VID0 VID (V) VID5 VID4 VID3 VID2 VID1 VID0 VID (V)
0010100.8375
0110101.2125
1010010.8500
1110011.2250
0010010.8625
0110011.2375
1010000.8750
1110001.2500
0010000.8875
0110001.2625
1001110.9000
1101111.2750
0001110.9125
0101111.2875
1001100.9250
1101101.3000
0001100.9375
0101101.3125
1001010.9500
1101011.3250
0001010.9625
0101011.3375
1001000.9750
1101001.3500
0001000.9875
0101001.3625
1000111.0000
1100111.3750
0000111.0125
0100111.3875
1000101.0250
1100101.4000
0000101.0375
0100101.4125
1000011.0500
1100011.4250
0000011.0625
0100011.4375
1000001.0750
1100001.4500
0000001.0875
0100001.4625
111111VRM off
1011111.4750
011111VRM off
0011111.4875
1111101.1000
1011101.5000
0111101.1125
0011101.5125
1111011.1250
1011011.5250
0111011.1375
0011011.5375
1111001.1500
1011001.5500
0111001.1625
0011001.5625
1110111.1750
1010111.5750
0110111.1875
0010111.5875
1110101.2000
1010101.6000