Datasheet

Features

108 Dual-Core Intel® Xeon® Processor 7100 Series Datasheet

7.4.3.8.3 PTCI: Processor Thread and Core Information

This location contains information regarding the number of cores and threads on the

processor. Writes to this register have no effect.

Example: The Dual-Core Intel Xeon processor 7100 series has two cores and two

threads per core. Therefore, this register will have a value of 0Ah.

7.4.3.8.4 APFF: Additional Processor Feature Flags

This location contains additional feature information for the processor. This field is

defined as follows: Writes to this register have no effect.

Bits are set when a feature is present, and cleared when they are not.

3 Reserved

2 OEM EEPROM present (set if there is a scratch ROM at offset 80 - FFh)

1 Core VID present (set if there is a VID provided by the processor)

0 L3 Cache present (set if there is a level 3 cache on the processor)

Offset: 78h

Bit Description

Offset: 79h

Bit Description

7:4 Reserved

3:2 Number of cores

1:0 Number of threads per core

Offset: 7Ah

Bit Description

7 Reserved

6Intel

Cache Safe Technology

5C1E State

4Intel

Virtualization Technology

3Execute Disable

2Intel

1 Thermal Monitor 2

0 Enhanced Intel Speed Step

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