Datasheet

Errata
48 Specification Update
AE77. Page Access Bit May Be Set Prior to Signaling a Code Segment Limit
Fault
Problem: If code segment limit is set close to the end of a code page, then due to this erratum
the memory page Access bit (A Bit) may be set for the subsequent page prior to
general protection fault on code segment limit.
Implication: When this erratum occurs, a non-accessed page, which is present in memory and
follows a page that contains the code segment limit may be tagged as accessed.
Workaround: Erratum can be avoided by placing a guard page (non-present or non-executable
page) as the last page of the segment or after the page that includes the code
segment limit.
Status: For the steppings affected, see the Summary Tables of Changes
.
AE78. Performance Monitoring Event for Hardware Prefetch Requests (4EH)
and Hardware Prefetch Request Cache Misses (4FH) May Not Be
Accurate
Problem: Performance monitoring event that count hardware prefetch requests and prefetch
misses may not be accurate.
Implication: This erratum may cause inaccurate counting for Hardware Prefetch Requests and
Hardware Prefetch Request Cache Misses.
Workaround: None Identified.
Status: For the steppings affected, see the Summary Tables of Changes
.
AE79. EFLAGS, CR0, CR4 and the EXF4 Signal May Be Incorrect after
Shutdown
Problem: When the processor is going into shutdown due to an RSM inconsistency failure,
EFLAGS, CR0 and CR4 may be incorrect. In addition the EXF4 signal may still be
asserted. This may be observed if the processor is taken out of shutdown by NMI#.
Implication: A processor that has been taken out of shutdown may have an incorrect EFLAGS, CR0
and CR4. In addition the EXF4 signal may still be asserted.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes
.