Datasheet

Errata
Specification Update 43
AE63. Erratum removed
AE64. EFLAGS Discrepancy on Page Faults after a Translation Change
Problem: This erratum is regarding the case where paging structures are modified to change a
linear address from writable to non-writable without software performing an
appropriate TLB invalidation. When a subsequent access to that address by a specific
instruction (ADD, AND, BTC, BTR, BTS, CMPXCHG, DEC, INC, NEG, NOT, OR,
ROL/ROR, SAL/SAR/SHL/SHR, SHLD, SHRD, SUB, XOR, and XADD) causes a page
fault, the value saved for EFLAGS may incorrectly contain the arithmetic flag values
that the EFLAGS register would have held had the instruction completed without fault.
This can occur even if the fault causes a VM exit or if its delivery causes a nested
fault.
Implication: None identified. Although the EFLAGS value saved may contain incorrect arithmetic
flag values, Intel has not identified software that is affected by this erratum. This
erratum will have no further effects once the original instruction is restarted because
the instruction will produce the same results as if it had initially completed without a
page fault.
Workaround: If the page fault handler inspects the arithmetic portion of the saved EFLAGS value,
then system software should perform a synchronized paging structure modification
and TLB invalidation.
Status: For the steppings affected, see the Summary Tables of Changes
.
AE65. Returning to Real Mode from SMM with EFLAGS.VM Set May Result in
Unpredictable System Behavior
Problem: Returning back from SMM mode into real mode while EFLAGS.VM is set in SMRAM may
result in unpredictable system behavior.
Implication: If SMM software changes the values of the EFLAGS.VM in SMRAM, it may result in
unpredictable system behavior. Intel has not observed this behavior in commercially-
available software.
Workaround: SMM software should not change the value of EFLAGS.VM in SMRAM.
Status: For the steppings affected, see the Summary Tables of Changes
.
AE66. A Thermal Interrupt Is Not Generated When the Current Temperature
Is Invalid
Problem: When the DTS (Digital Thermal Sensor) crosses one of its programmed thresholds it
generates an interrupt and logs the event (IA32_THERM_STATUS MSR (019Ch) bits
[9,7]). Due to this erratum, if the DTS reaches an invalid temperature (as indicated
IA32_THERM_STATUS MSR bit[31]) it does not generate an interrupt even if one of
the programmed thresholds is crossed and the corresponding log bits become set.
Implication: When the temperature reaches an invalid temperature the CPU does not generate a
Thermal interrupt even if a programmed threshold is crossed.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes
.