Datasheet
Summary Tables of Changes
12 Specification Update
Stepping
Stepping
Number
A1 E1
Plans ERRATA
AR1
X X
No Fix Writing the Local Vector Table (LVT) When an Interrupt Is Pending
May Cause an Unexpected Interrupt
AR2
X X
No Fix LOCK# Asserted during a Special Cycle Shutdown Transaction May
Unexpectedly Deassert
AR3
X X
No Fix Address Reported by Machine-Check Architecture (MCA) on Single-bit
L2 ECC Errors May Be Incorrect
AR4
X X
No Fix VERW/VERR/LSL/LAR Instructions May Unexpectedly Update the Last
Exception Record (LER) MSR
AR5
X X
No Fix DR3 Address Match on MOVD/MOVQ/MOVNTQ Memory Store
Instruction May Incorrectly Increment Performance Monitoring Count
for Saturating SIMD Instructions Retired (Event CFH)
AR6
X
Fixed SYSRET May Incorrectly Clear RF (Resume Flag) in the RFLAGS
Register
AR7
X X
No Fix General Protection Fault (#GP) for Instructions Greater than 15 Bytes
May Be Preempted
AR8
X X
No Fix Pending x87 FPU Exceptions (#MF) Following STI May Be Serviced
before Higher Priority Interrupts
AR9 X X No Fix The Processor May Report a #TS Instead of a #GP Fault
AR10
X X
No Fix A Write to an APIC Register Sometimes May Appear to Have Not
Occurred
AR11
X X
No Fix Programming the Digital Thermal Sensor (DTS) Threshold May Cause
Unexpected Thermal Interrupts
AR12
X X
No Fix Count Value for Performance-Monitoring Counter PMH_PAGE_WALK
May Be Incorrect
AR13 X X No Fix LER MSRs May Be Incorrectly Updated
AR14
X X
No Fix Performance Monitoring Events for Retired Instructions (C0H) May
Not Be Accurate
AR15
X X
No Fix Performance Monitoring Event For Number Of Reference Cycles When
The Processor Is Not Halted (3CH) Does Not Count According To The
Specification
AR16
X
Fixed Using 2M/4M Pages When A20M# Is Asserted May Result in Incorrect
Address Translations
AR17
X X
No Fix Writing Shared Unaligned Data that Crosses a Cache Line without
Proper Semaphores or Barriers May Expose a Memory Ordering Issue
AR18 X X No Fix Code Segment Limit Violation May Occur On 4 Gigabyte Limit Check
AR19 X Fixed FP Inexact-Result Exception Flag May Not Be Set
AR20
X
Fixed Global Pages in the Data Translation Look-Aside Buffer (DTLB) May
Not Be Flushed by RSM instruction before Restoring the Architectural
State from SMRAM