Datasheet

Errata
Specification Update 77
AH93. EFLAGS, CR0, CR4 and the EXF4 Signal May Be Incorrect after
Shutdown
Problem: When the processor is going into shutdown due to an RSM inconsistency failure,
EFLAGS, CR0 and CR4 may be incorrect. In addition the EXF4 signal may still be
asserted. This may be observed if the processor is taken out of shutdown by NMI#.
Implication: A processor that has been taken out of shutdown may have an incorrect EFLAGS, CR0
and CR4. In addition the EXF4 signal may still be asserted.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.
AH94. Performance Monitoring Counter MACRO_INSTS.DECODED May Not
Count Some Decoded Instructions
Problem: MACRO_INSTS.DECODED performance monitoring counter (Event 0AAH, Umask 01H)
counts the number of macro instructions decoded, but not necessarily retired. The
event is undercounted when the decoded instructions are a complete loop iteration
that is decoded in one cycle and the loop is streamed by the LSD (Loop Stream
Detector), as described in the Optimizing the Front End section of the Intel
®
64 and
IA-32 Architectures Optimization Reference Manual.
Implication: The count value returned by the performance monitoring counter
MACRO_INST.DECODED may be lower than expected. The degree of undercounting is
dependent on the occurrence of loop iterations that are decoded in one cycle and
whether the loop is streamed by the LSD while the counter is active.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.
AH95. The Stack May Be Incorrect as a Result of VIP/VIF Check on SYSEXIT
and SYSRET
Problem: The stack size may be incorrect under the following scenario:
Problem: 1. The stack size was changed due to a SYSEXIT or SYSRET
Problem: 2. PVI (Protected Mode Virtual Interrupts) mode was enabled (CR4.PVI == 1)
Problem: 3. Both the VIF (Virtual Interrupt Flag) and VIP (Virtual Interrupt Pending) flags of the
EFLAGS register are set
Implication: If this erratum occurs the stack size may be incorrect, consequently this may result in
unpredictable system behavior. Intel has not observed this erratum with any
commercially available software.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.