Datasheet

Errata
50 Specification Update
AH21. Global Pages in the Data Translation Look-Aside Buffer (DTLB) May
Not Be Flushed by RSM instruction before Restoring the Architectural
State from SMRAM
Problem: The Resume from System Management Mode (RSM) instruction does not flush global
pages from the Data Translation Look-Aside Buffer (DTLB) prior to reloading the saved
architectural state.
Implication: If SMM turns on paging with global paging enabled and then maps any of linear
addresses of SMRAM using global pages, RSM load may load data from the wrong
location.
Workaround: Do not use global pages in system management mode.
Status: For the steppings affected, see the Summary Tables of Changes.
AH22. Sequential Code Fetch to Non-canonical Address May Have
Nondeterministic Results
Problem: If code sequentially executes off the end of the positive canonical address space
(falling through from address 00007fffffffffff to non- canonical address
0000800000000000), under some circumstances the code fetch will be converted to a
canonical fetch at address ffff800000000000.
Implication: Due to this erratum, the processor may transfer control to an unintended address. The
result of fetching code at that address is unpredictable and may include an
unexpected trap or fault, or execution of the instructions found there.
Workaround: If the last page of the positive canonical address space is not allocated for code (4K
page at 00007ffffffff000 or 2M page at 00007fffffe00000) then the problem cannot
occur.
Status: For the steppings affected, see the Summary Tables of Changes.
AH23. VMCALL to Activate Dual-monitor Treatment of SMIs and SMM Ignores
Reserved Bit Settings in VM-exit Control Field
Problem: Processors supporting Intel
®
Virtualization Technology can execute VMCALL from
within the Virtual Machine Monitor (VMM) to activate dual-monitor treatment of SMIs
and SMM. Due to this erratum, if reserved bits are set to values inconsistent with VMX
Capability MSRs, VMCALL may not VMFail.
Implication: VMCALL executed to activate dual-monitor treatment of SMIs and SMM may not
VMFail due to incorrect reserved bit settings in VM-Exit control field.
Workaround: Software should ensure that all VMCS reserved bits are set to values consistent with
VMX Capability MSRs.
Status: For the steppings affected, see the Summary Tables of Changes.