Datasheet
Summary Tables of Changes
38 Specification Update
Number
Stepping
Stepping
Stepping
Plans
Errata
A-1
E-1
M-1
AH41
X
Fixed
PREFETCHh Instructions May Not Be Executed when Alignment
Check (AC) Is Enabled
AH42
X
Fixed
Upper 32 Bits of the FPU Data (Operand) Pointer in the FXSAVE
Memory Image May Be Unexpectedly All 1‟s after FXSAVE
AH43
Fixed
Concurrent Multi-processor Writes to Non-dirty Page May Result in
Unpredictable Behavior
AH44
X
Fixed
Performance Monitor IDLE_DURING_DIV (18h) Count May Not Be
Accurate
AH45
X
X
X
No Fix
Values for LBR/BTS/BTM Will Be Incorrect after an Exit from SMM
AH47
X
Fixed
SYSCALL Immediately after Changing EFLAGS.TF May Not Behave
According to the New EFLAGS.TF
AH49
X
X
X
No Fix
VM Bit Is Cleared on Second Fault Handled by Task Switch from
Virtual-8086 (VM86)
AH50
X
Fixed
IA32_FMASK Is Reset during an INIT
AH51
X
X
X
No Fix
An Enabled Debug Breakpoint or Single Step Trap May Be Taken
after MOV SS/POP SS Instruction if it is Followed by an
Instruction That Signals a Floating Point Exception
AH52
X
X
X
No Fix
Last Branch Records (LBR) Updates May Be Incorrect after a Task
Switch
AH53
X
X
X
No Fix
IO_SMI Indication in SMRAM State Save Area May Be Set
Incorrectly
AH54
X
X
X
No Fix
INIT Does Not Clear Global Entries in the TLB
AH55
X
Fixed
Using Memory Type Aliasing with Memory Types WB/WT May
Lead to Unpredictable Behavior
AH56
X
Fixed
Update of Read/Write (R/W) or User/Supervisor (U/S) or Present
(P) Bits without TLB Shootdown May Cause Unexpected Processor
Behavior
AH57
X
Fixed
BTS Message May Be Lost When the STPCLK# Signal Is Active
AH58
X
X
X
No Fix
MOV To/From Debug Registers Causes Debug Exception
AH59
X
X
X
No Fix
EFLAGS Discrepancy on a Page Fault after a Multiprocessor TLB
Shootdown
AH60
X
X
X
No Fix
LBR, BTS, BTM May Report a Wrong Address when an
Exception/Interrupt Occurs in 64-bit Mode
AH61
X
X
X
No Fix
A Thermal Interrupt Is Not Generated when the Current
Temperature Is Invalid
AH62
X
X
X
No Fix
CMPSB, LODSB, or SCASB in 64-bit Mode with Count Greater or
Equal to 2
48
May Terminate Early
AH64
X
X
X
No Fix
Returning to Real Mode from SMM with EFLAGS.VM Set May
Result in Unpredictable System Behavior
AH66
X
X
X
No Fix
IRET under Certain Conditions May Cause an Unexpected
Alignment Check Exception