Datasheet
Summary Tables of Changes
26 Specification Update
Number
Stepping
Stepping
Stepping
Plans
ERRATA
B-2
L-2
A-1
AH78
X
X
X
No Fix
Performance Monitor SSE Retired Instructions May Return
Incorrect Values
AH79
X
X
X
No Fix
Performance Monitoring Events for L1 and L2 Miss May Not
Be Accurate
AH80
X
X
X
No Fix
Store to WT Memory Data May Be Seen in Wrong Order by
Two Subsequent Loads
AH81
X
X
X
No Fix
A MOV Instruction from CR8 Register with 16 Bit Operand
Size Will Leave Bits 63:16 of the Destination Register
Unmodified
AH82
X
X
X
Plan Fix
Debug Register May Contain Incorrect Information on a
MOVSS or POPSS Instruction followed by SYSRET
AH83
X
X
X
No Fix
Single Step Interrupts with Floating Point Exception
Pending May Be Mishandled
AH84
X
X
No Fix
Non-Temporal Data Store May Be Observed in Wrong
Program Order
AH85
X
X
X
No Fix
Fault on ENTER Instruction May Result in Unexpected
Values on Stack Frame
AH86
X
X
Plan Fix
CPUID Reports Architectural Performance
Monitoring Version 2 is Supported, When Only Version 1
Capabilities are Available
AH87
X
X
X
No Fix
Unaligned Accesses to Paging Structures May Cause the
Processor to Hang
AH88
X
X
No Fix
Microcode Updates Performed During VMX Non-root
Operation Could Result in Unexpected Behavior
AH89
X
X
X
No Fix
INVLPG Operation for Large (2M/4M) Pages May be
Incomplete under Certain Conditions
AH90
X
X
X
No Fix
Page Access Bit May be Set Prior to Signaling a Code
Segment Limit Fault
AH91
X
X
X
Plan Fix
Update of Attribute Bits on Page Directories without
Immediate TLB Shootdown May Cause Unexpected
Processor Behavior
AH92
X
X
X
Plan Fix
Invalid Instructions May Lead to Unexpected Behavior
AH93
X
X
X
No Fix
EFLAGS, CR0, CR4 and the EXF4 Signal May be Incorrect
after Shutdown
AH94
X
X
X
Plan Fix
Performance Monitoring Counter MACRO_INSTS.DECODED
May Not Count Some Decoded Instructions
AH95
X
X
X
Plan Fix
The Stack May be Incorrect as a Result of VIP/VIF Check
on SYSEXIT and SYSRET
AH96
X
X
X
No Fix
Performance Monitoring Event SIMD_UOP_TYPE_EXEC.MUL
is Counted Incorrectly for PMULUDQ Instruction
AH97
X
X
X
No Fix
Storage of PEBS Record Delayed Following Execution of
MOV SS or STI