Datasheet

Mobile Intel
®
Celeron
®
Processor (0.18µ) in BGA2 and Micro-PGA2 Packages
Datasheet 283654-003 78
Figure 25. PLL Filter Specifications
0 dB
-28 dB
-34 dB
0.2 dB
forbidden
zone
x dB
forbidden
zone
1 MHz 66 MHz
f
core
f
pea
k
1 HzDC
passband
high frequency
band
x = 20.log[(Vcct-60 mV)
/
Vcct]
NOTES:
1. Diagram is not to scale
2. No specification for frequencies beyond fcore.
3. Fpeak, if existent, should be less than 0.05 MHz.
A.3 Recommendation for Mobile Systems
The following LC components are recommended. The tables will be updated as other suitable
components and specifications are identified.
Table 41. PLL Filter Inductor Recommendations
Inductor Part Number Value Tol SRF Rated
I
DCR Min Damping R
needed
L1 TDK MLF2012A4R7KT
4.7 µH
10% 35 MHz 30 mA
0.56Ω
(1Ω max)
0Ω
L2 Murata LQG21N4R7K10
4.7 µH
10% 47 MHz 30 mA
0.7Ω (+/-
50%)
0Ω
L3 Murata LQG21C4R7N00
4.7 µH
30% 35 MHz 30 mA
0.3Ω max 0.2Ω (assumed)
NOTE: Minimum damping resistance is calculated from 0.35Ω – DCR
min
. From vendor provided data, L1 and
L2 DCR
min
is 0.4 Ω and 0.5 Ω respectively, qualifying them for zero required trace resistance. DCR
min
for L3 is not known and is assumed to be 0.15 Ω. There may be other vendors who might provide
parts of equivalent characteristics and the OEMs should consider doing their own testing for selecting
their own vendors.