Hub Datasheet

Intel
®
E7505 Chipset MCH Datasheet 169
Functional Description
5.6 System Manageability Bus 2.0
The MCH supports the following features:
Address Resolution Protocol (ARP)
Alert Standard Forum (ASF)
Packet Error Checking (PEC)
SMBus Signaling
The System Management Bus (SMBus) is a two-wire interface where the system can communicate
with other devices. A system using SMBus passes messages to and from devices. With SMBus, a
device can provide manufacturer information, model/part number information, save its state for a
suspend event, report different types of errors, accept control parameters, and return its status.
Refer to the SMBus Specification, Revision 2.0 for additional information.
5.7 Power Management
Power Management Support Overview
The MCH supports the following Processor/System States:
Processor states: C0, C1
ACPI System States: S0, S1, S3–S5
Specifications Supported
ACPI Specification, Revision 1.0b
ACPI Specification, Revision 2.0
PCI Power Management Specification, Revision 1.0
PC 2001 Specification