Hub Datasheet

8 Intel
®
E7505 Chipset MCH Datasheet
7 Ballout and Package Information.................................................................... 183
7.1 Ballout Assignment ........................................................................................... 183
7.2 Package Specifications ..................................................................................... 204
7.3 Interface Trace Length Compensation.............................................................. 206
7.3.1 System Bus Signal Package Trace Length Data ................................. 207
7.3.2 DDR Channel A Signal Package Trace Length Data........................... 209
7.3.3 DDR Channel B Signal Package Trace Length Data........................... 211
7.3.4 Hub Interface_A Signal Package Trace Length Data........................... 213
7.3.5 Hub Interface_B Signal Package Trace Length Data........................... 213
7.3.6 AGP Signal Package Trace Length Data.............................................214
8 Testability.................................................................................................................. 215
8.1 XOR Test Mode Initialization............................................................................. 215
8.1.1 XOR Chains ......................................................................................... 215